May 02, 2025

My Ethics

This essay discusses the importance of having a personal code of ethics and using a thoughtful decision-making process to promote ethical behavior in organizations and professions.

iastate

Mar 27, 2025

Making Vivado not suck at Git

Post on how I made Vivado not suck at Git

Git Vivado iastate

Dec 18, 2021

Sustainability and Extension as a Solution to World Hunger

An AI Solution to Evaluating the Adoption of Innovations I presented at AGEDS 461 at Iowa State University.

iastate

Verilog Single Cycle MIPS

A single cycle mips processor implementation in verilog.

Verilog iastate

CPRE488 MP0

The first Project from CPRE488 at Iowa State University

C VHDL Vivado +1 more

CPRE488 MP1

The second Project from CPRE488 at Iowa State University

C VHDL Vivado +1 more

CPRE488 MP2

The third Project from CPRE488 at Iowa State University

C C++ VHDL +3 more

CPRE488-mp3

Mini-project 3 for CPRE488. Linux Device Drivers, Petalinux, boot loaders, and OpenCV, oh my!

C C++ VHDL +3 more

cpre488-mp4

Cascaded PID controller stack (attitude → attitude-rate) on Crazyflie drone with per-drone config and axis-dominance filter.

C C++ CPRE488 +2 more

mips-cpu-design

Study in MIPS microarchitecture trade-offs implementing three CPU designs: single-cycle, hardware-scheduled multicycle, and software-scheduled pipelined core.

MIPS Python Verilog +1 more

sddec25-01

Senior design project at Iowa State University.

Open Source Python iastate